2010-04-14  Alex Schuilenburg <alexs@ecoscentric.com>
	* include/hal_platform_setup.h: Included the two wait state fix
	for SAM7S512 devices under all circumstances.

2009-11-16  Nick Garnett  <nickg@ecoscentric.com>

	* include/hal_platform_setup.h: Select two wait states for
	SAM7X512 devices under all circumstances. There is an erratum that
	indicates that X512 rev. A parts should use 1 wait state above
	25MHz rather than 30MHz. However, our experience is that a 48MHz
	part running with 1 wait state also has problems. Selecting 2 wait
	states should be acceptable for all.

2009-07-24  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Add support for JTAG startup.

	* include/pkgconf/mlt_arm_at91sam7x512_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7x512_rom.h:
	* include/pkgconf/mlt_arm_at91sam7x512_ram.ldi:
	* include/pkgconf/mlt_arm_at91sam7x512_ram.h:
	* include/pkgconf/mlt_arm_at91sam7x512_jtag.ldi:
	* include/pkgconf/mlt_arm_at91sam7x512_jtag.h: Add linker script
	files for SAM7X152 devices.

2009-03-18  Bart Veer  <bartv@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: CYGHWR_HAL_ARM_AT91SAM7A3, only impose
	constraints on the CAN driver when the latter is active.

2009-03-05  Bart Veer  <bartv@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: update compiler flags for gcc 4.x

2009-01-24  Bart Veer <bartv@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: switch from arm-elf-gcc to
	arm-eabi-gcc.

2008-11-03  Gabor Toeroek <tgabor84@gmail.com>

	* cdl/hal_arm_at91sam7s.cdl
	* include/hal_platform_ints.h
	* include/plf_io.h
	* include/var_io.h: Add support for AT91SAM7SE
	
2008-10-31  Oliver Munz" <munz@speag.ch>

	* cdl/hal_arm_at91sam7s.cdl: Allow external clock input to be up
	to 50Mhz, but the crystal is limited to 30MHz.

2008-10-19  Igor B. Poretsky <poretsky@mlbox.ru>
	    Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: Fix calculation of RTC period. The TC
	uses a different divider as the PIT.

2008-09-04  John Eigelaar  <jeigelaar@mweb.co.za>

	* cdl/hal_arm_at91sam7s.cdl: Set MOR OSCCOUNT and PLL Count to
	values suggests by Atmel. This should make the startup stable for
	all devices.
  	
2008-09-02  John Eigelaar  <jeigelaar@mweb.co.za>

	* include/plf_io.h: Added definitions for devices
	  that has a second flash controller. Thus far only the 
	  at91sam7x512 is supported.

2008-09-01  John Eigelaar  <jeigelaar@mweb.co.za>

	* cdl/hal_arm_at91sam7s.cdl: CDL for the MOR OSCCOUNT and 
	  PLLR PLLCOUNT.
	* include/hal_platform_setup.h: Turned the MOR OSCCOUNT 
	  and the PLLR PLLCOUNT setup into CLD configurable 
	  variables to allow a more flexible clock setup.
	* include/hal_platform_setup.h: Added setup code for devices
	  that has a second flash controller i.e. the 512 devices.

2008-08-14  Jürgen Lambrecht <J.Lambrecht@televic.com>

	* include/plf_io.h: removed AT91_SPI_MR_MODFDIS, AT91_WSTC
	(AT91_WDTC), AT91_AIC because already in var_io.h. Fixed typo.

2008-06-17  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/hal_platform_setup.h: Ensure flash wait states enabled
	correctly when clock <30MHz.

	* include/plf_io.h: Add HAL_I2C_EXPORTED_DEVICES definition
	to provide I2C bus for apps.

2008-05-11  James G. Smith <jsmith@rallysmith.co.uk
            Andrew Lunn  <andrew@lunn.ch>

	* cdl/hal_arm_at91sam7s.cdl: CDL for crystal vs clock signal.
	* include/hal_platform_setup.h: Rework flash wait states to remove
	redundant code when running at > 60MHz. Support clock signal input
	when starting the main clock.

2008-04-30  John Eigelaar  <jeigelaar@mweb.co.za>

	* include/pkgconf/mlt_arm_at91sam7x512_rom.{h|ldi}: Added the 
	memory layout files to support the at91sam7x512  
	* cdl/hal_arm_at91s.cdl: Added the configuration options to 
	support the at91sam7x512
	
2008-04-23  Andrew Lunn  <andrew.lunn@ascom.ch>

	* include/hal_platform_setup.h: Fix setting the flash wait states
	when the clock is running faster than 60MHz. r0 was undefined 
	causing a data abort.
	
2008-01-10  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/at91sam7_misc.c (hal_plf_hardware_init): HAL_PLF_ETH_INIT
	is now called from AT91 variant HAL.

2007-10-17  Nick Garnett  <nickg@ecoscentric.com>

	* include/hal_platform_setup.h: Modify flash init code in line
	with new definitions and add support for second flash controller
	on 512 variant.

2007-10-12  Nick Garnett  <nickg@ecoscentric.com>

	* include/pkgconf/mlt_arm_at91sam7s512_jtag.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s512_jtag.h: 
	* include/pkgconf/mlt_arm_at91sam7s512_rom.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s512_rom.h: 
	* include/pkgconf/mlt_arm_at91sam7s512_ram.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s512_ram.h:
	* cdl/hal_arm_at91sam7.cdl: Add AT91SAM7S512 to list of supported
	devices.

2007-09-25  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/plf_io.h (CYGARC_VIRTUAL_ADDRESS): Define as identity
	function.
	(CYGARC_UNCACHED_ADDRESS): Ditto.

2007-07-11  John Dallaway  <jld@ecoscentric.com>

	* include/pkgconf/*.ldi: Add .RELOCS, .eh_frame and .got linker
	sections.

2007-06-21  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/at91sam7_misc.c (hal_plf_hardware_init): Enable peripheral
	mode for RTS0 and CTS0 pins.

2007-06-18  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/at91sam7_misc.c (hal_plf_hardware_init): Disable watchdog
	if no hardware watchdog rather than any watchdog at all
	(otherwise could be the emulated watchdog).
	Additionally, this is not relevant for SAM7A1/SAM7A2
	(indicated by CYGHWR_HAL_ARM_AT91SAM7A), so only do then.

2007-06-14  John Dallaway  <jld@ecoscentric.com>

	* include/pkgconf/mlt_arm_at91sam7s256_jtag.ldi: Place
	.rom_vectors in RAM.

2007-03-26  Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: SAM7X and SAM7XC have a CAN bus
	controller.

2007-03-14  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/hal_platform_setup.h: Fix wait state sets for >60MHz.

2007-03-12  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/hal_platform_setup.h: Wait for MCKRDY after switching
	to slow clock. Correct assignment to PMC_PLL register.

2007-03-09  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Add missing display strings.

2007-03-08  Jonathan Larmour  <jifl@eCosCentric.com>

	* cdl/hal_arm_at91sam7.cdl (CYGSEM_HAL_ROM_MONITOR): Ensure ROM
	startup is used.
	(CYGBLD_BUILD_GDB_STUBS): New option to build gdb_module.bin.

	* include/hal_platform_setup.h: Disable PLL before configuring it,
	otherwise if a JTAG device had already done so, the LOCK bit will
	never be set.

2007-03-05  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Reference per-package HTML documentation.

2007-03-01  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Force Thumb interwork for ROM
	monitors. The config tools occasionally infer things the wrong way
	without this.

2007-02-22  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Add CAN device configuration.

	* include/plf_io.h (AT91_CAN0, AT91_CAN1): Add CAN device base
	addresses for SAM7A3 devices.

	* include/hal_platform_ints.h (CYGNUM_HAL_INTERRUPT_CAN0):
	Regularize CAN interrupt naming scheme.

	* src/at91sam7_misc.c (hal_plf_hardware_init): Add initialization
	for CAN controllers for SAM7X and SAM7A3 devices.

2007-01-17  John Eigelaar <jeigelaar@mweb.co.za>

	* include/plf_io.h
	* src/at91sam7s_misc.c
	Added code to initialise the platform ethernet hardware if need be
	 
2006-11-13  Nick Garnett  <nickg@ecoscentric.com>

	* src/at91sam7_misc.c (hal_plf_hardware_init): Added power enable
	for I2C/TWI interface.

	* src/at91sam7_i2c.c: Lots of changes to get working with aardvark
	test programs. Added support for polled operation. Fixed bugs in
	termination of transmissions and STOP handling in single byte
	transfers.

2006-11-06  Nick Garnett  <nickg@ecoscentric.com>

	* include/pkgconf/mlt_arm_at91sam7s256_ram.ldi: Fix the same typo
	in here as was fixed in the equivalent sam7x file below.

2006-11-02  Nick Garnett  <nickg@ecoscentric.com>

	* include/pkgconf/mlt_arm_at91sam7x256_ram.ldi: Fix typo.

	* include/plf_io.h: Added SPI PDC definitions.

2006-10-30  Nick Garnett  <nickg@ecoscentric.com>

	* src/at91sam7_i2c.c: 
	* cdl/hal_arm_at91sam7.cdl: Added I2C driver. This is derived from
	the AT91RM9200 driver.

2006-10-27  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Fix up CFLAGS and LDFLAGS.

	* include/hal_platform_setup.h: Fix bug in SAM7A memory controller
	setup: MCR address line enable was set to use A20/CS3 as CS3,
	limiting external addresses to 1MiB, which caused problems for
	2MiB flash.

	* include/hal_platform_ints.h: Added descriptive comments to
	interrupt vectors.

	* include/pkgconf/mlt_arm_at91sam7x256_jtag.ldi: Fix typo.

	* doc/at91sam7.sgml: Added processor documentation.

2006-10-20  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_at91sam7.cdl: Modified definition of
	CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS to select either onchip RAM or
	ROM by default, depending on startup type. Platform HALs may place
	it elsewhere at their discretion.
	Added definitions of CYGHWR_HAL_ARM_AT91SAM7_EXTRAM_LENGTH and
	CYGHWR_HAL_ARM_AT91SAM7_EXTROM_LENGTH to specify sizes of external
	RAM and ROM. These must be defined by the platform HAL if the
	board has external memory fitted.

	* include/pkgconf/mlt_arm_at91sam7a2_jtag.h:
	* include/pkgconf/mlt_arm_at91sam7a2_jtag.ldi:
	* include/pkgconf/mlt_arm_at91sam7a2_ram.h:
	* include/pkgconf/mlt_arm_at91sam7a2_ram.ldi:
	* include/pkgconf/mlt_arm_at91sam7a2_rom.h:
	* include/pkgconf/mlt_arm_at91sam7a2_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7s256_ram.ldi:
	* include/pkgconf/mlt_arm_at91sam7x256_ram.ldi: Updated to use
	CYGNUM_HAL_ARM_AT91_IMAGE_ADDRESS,
	CYGHWR_HAL_ARM_AT91SAM7_EXTRAM_LENGTH,
	CYGHWR_HAL_ARM_AT91SAM7_EXTROM_LENGTH as appropriate.

	* include/pkgconf/mlt_arm_at91sam7a3_rom.h:
	* include/pkgconf/mlt_arm_at91sam7a3_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7s256_jtag.h:
	* include/pkgconf/mlt_arm_at91sam7s256_jtag.ldi:
	* include/pkgconf/mlt_arm_at91sam7x256_jtag.h:
	* include/pkgconf/mlt_arm_at91sam7x256_jtag.ldi: Added these to
	support various new configurations.
	
2006-10-12  Nick Garnett  <nickg@ecoscentric.com>

	* include/hal_platform_ints.h: Added interrupt definitions for
	SAM7A3 part.

2006-10-10  Nick Garnett  <nickg@ecoscentric.com>

	* src/at91sam7_misc.c (hal_plf_hardware_init): Reorganized SAM7A
	UART initialization.

	* include/plf_io.h: Tidied up UART support.

	* cdl/hal_arm_at91sam7.cdl: Tidied up use of serial line interface
	implementations. These are now done in the platform HAL.

2006-10-05  Nick Garnett  <nickg@ecoscentric.com>

	* all: Merged from anoncvs, with various changes to fit in to
	eCosCentric AT91 world. Added support for SAM7A parts.

2006-06-01  John Eigelaar <jeigelaar@mweb.co.za>

	* include/plf_io.h: Added definition for SPI Mode Failure Disable bit
	in the SPI Mode register.

2006-06-01  Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: Implement the SPI bus 1 interface for
	the SAM7X and SAM7XC.

2006-06-01  John Eigelaar <jeigelaar@mweb.co.za>

	* include/plf_io.h: Add SPI DMA registers.

2006-05-20  John Eigelaar <jeigelaar@mweb.co.za>

	include/pkgconf/mlt_arm_at91sam7x128_rom.{h|ldi}
	include/pkgconf/mlt_arm_at91sam7x256_rom.{h|ldi}: Linker files
	for AT91SAM7X processor.
	
2006-05-17  Andrew Lunn  <andrew.lunn@ascom.ch>

	* src/at91sam7s_misc.c: Use the AT91 generic PIO manipulation
	macros. Move the LED function out into the board specific HAL
	package.

2006-04-07  Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: 
	* include/pkgconf/mlt_arm_at91sam7s32_rom.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s64_rom.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s128_rom.ldi: 
	* include/pkgconf/mlt_arm_at91sam7s267_rom.ldi: 
	Allow CDL to control where in flash the image is placed.

2006-03-23  Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: Implement the USB interface when chip
	has the device.
	
2006-03-10  Oliver Munz  <oli@snr.ch>

	* hal_arm_at91sam7s.cdl: Change the PLL-defaults so that 96MHz is
	generated so that the USB does work.
	
2006-03-10  Andrew Lunn  <andrew.lunn@ascom.ch>
            Oliver Munz  <munz@speag.ch>
	
	* cdl/hal_arm_at91sam7s.cdl: Set the debug UART as the default
	channel and fix some dodge spelling.
	* src/at91sam7s_misc.c (hal_plf_hardware_init): Enable the Debug UART
	pins for output and control by the device.
	* include/plf_io.h: Define USART2 to be the debug UART.
	
2006-03-01  Andrew Lunn  <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl: Change the crystal frequency.  The
	numbers printed on top of the crystal are misleading. It has a
	18.432MHz crystal, not 20MHz. This error when combined with the
	previous fix to the PLL made the serial baud rate wrong.  Change
	the multiplier and divisor to achieve about the same CPU clock,
	which should be USB compatible.
	* src/at91sam7s_misc.c (hal_at91_us_baud): Need the same PLL fix
	when calculating the baud rate dynamically.
	* include/plf_io.h: Add the Programmable Clock Output registers.
	
2006-02-28  Oliver Munz <munz@speag.ch>

	* include/hal_platform_setup.h: Fix the PLL multiplier settings
	
2006-02-25  Andrew Lunn <andrew.lunn@ascom.ch>

	* misc/redboot_R[AO]M.ecm: Disable FIS and fconfig, enable
	loading directly into flash with the load command.
	
2006-01-01  Oliver Munz <munz@speag.ch>
	    Andrew Lunn <andrew.lunn@ascom.ch>

	* cdl/hal_arm_at91sam7s.cdl:
	* include/hal_platform_ints.h:
	* include/hal_platform_setup.h:
	* include/plf_io.h:
	* include/pkgconf/mlt_arm_at91sam7s256_rom.h:
	* include/pkgconf/mlt_arm_at91sam7s256_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7s128_rom.h:
	* include/pkgconf/mlt_arm_at91sam7s128_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7s64_rom.h:
	* include/pkgconf/mlt_arm_at91sam7s64_rom.ldi:
	* include/pkgconf/mlt_arm_at91sam7s32_rom.h:
	* include/pkgconf/mlt_arm_at91sam7s32_rom.ldi:
	* src/at91sam7s_misc.c:
	* misc/redboot_ROM.ecm:
	* misc/redboot_RAM.ecm:
	* ChangeLog: First import of a hal for the AT91SAM7S family.

//===========================================================================
// ####GPLCOPYRIGHTBEGIN####                                                
// -------------------------------------------                              
// This file is part of eCos, the Embedded Configurable Operating System.   
// Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.            
// Copyright (C) 2006, 2007, 2008 eCosCentric Limited                       
//
// This program is free software; you can redistribute it and/or modify     
// it under the terms of the GNU General Public License as published by     
// the Free Software Foundation; either version 2 or (at your option) any   
// later version.                                                           
//
// This program is distributed in the hope that it will be useful, but      
// WITHOUT ANY WARRANTY; without even the implied warranty of               
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU        
// General Public License for more details.                                 
//
// You should have received a copy of the GNU General Public License        
// along with this program; if not, write to the                            
// Free Software Foundation, Inc., 51 Franklin Street,                      
// Fifth Floor, Boston, MA  02110-1301, USA.                                
// -------------------------------------------                              
// ####GPLCOPYRIGHTEND####                                                  
//===========================================================================
