eCosPro® Reference Manual
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# IXP4xx interrupt controller

## Name

IXP4xx interrupt controller -- Interrupt controller definitions and usage

## Interrupt controller definitions

The file `<cyg/hal/hal_var_ints.h>` (located at `hal/arm/xscale/ixp425/VERSION/include/hal_var_ints.h` in the eCos source repository) contains interrupt vector number definitions for use with the eCos kernel and driver interrupt APIs:

    #define CYGNUM_HAL_INTERRUPT_NONE         -1
    #define CYGNUM_HAL_INTERRUPT_NPEA         0
    #define CYGNUM_HAL_INTERRUPT_NPEB         1
    #define CYGNUM_HAL_INTERRUPT_NPEC         2
    #define CYGNUM_HAL_INTERRUPT_QM1          3
    #define CYGNUM_HAL_INTERRUPT_QM2          4
    #define CYGNUM_HAL_INTERRUPT_TIMER0       5
    #define CYGNUM_HAL_INTERRUPT_GPIO0        6
    #define CYGNUM_HAL_INTERRUPT_GPIO1        7
    #define CYGNUM_HAL_INTERRUPT_PCI_INT      8
    #define CYGNUM_HAL_INTERRUPT_PCI_DMA1     9
    #define CYGNUM_HAL_INTERRUPT_PCI_DMA2     10
    #define CYGNUM_HAL_INTERRUPT_TIMER1       11
    #define CYGNUM_HAL_INTERRUPT_USB          12
    #define CYGNUM_HAL_INTERRUPT_UART2        13
    #define CYGNUM_HAL_INTERRUPT_TIMESTAMP    14
    #define CYGNUM_HAL_INTERRUPT_UART1        15
    #define CYGNUM_HAL_INTERRUPT_WDOG         16
    #define CYGNUM_HAL_INTERRUPT_AHB_PMU      17
    #define CYGNUM_HAL_INTERRUPT_XSCALE_PMU   18
    #define CYGNUM_HAL_INTERRUPT_GPIO2        19
    #define CYGNUM_HAL_INTERRUPT_GPIO3        20
    #define CYGNUM_HAL_INTERRUPT_GPIO4        21
    #define CYGNUM_HAL_INTERRUPT_GPIO5        22
    #define CYGNUM_HAL_INTERRUPT_GPIO6        23
    #define CYGNUM_HAL_INTERRUPT_GPIO7        24
    #define CYGNUM_HAL_INTERRUPT_GPIO8        25
    #define CYGNUM_HAL_INTERRUPT_GPIO9        26
    #define CYGNUM_HAL_INTERRUPT_GPIO10       27
    #define CYGNUM_HAL_INTERRUPT_GPIO11       28
    #define CYGNUM_HAL_INTERRUPT_GPIO12       29
    #define CYGNUM_HAL_INTERRUPT_SW_INT1      30
    #define CYGNUM_HAL_INTERRUPT_SW_INT2      31

    #ifdef CYGHWR_HAL_ARM_XSCALE_CPU_IXP46x
    #define CYGNUM_HAL_INTERRUPT_USB_HOST     32
    #define CYGNUM_HAL_INTERRUPT_I2C          33
    #define CYGNUM_HAL_INTERRUPT_SPI          34
    #define CYGNUM_HAL_INTERRUPT_TIMESYNC     35
    #define CYGNUM_HAL_INTERRUPT_EAU_DONE     36
    #define CYGNUM_HAL_INTERRUPT_SHA_DONE     37
    #define CYGNUM_HAL_INTERRUPT_SWCP_PERR    58
    #define CYGNUM_HAL_INTERRUPT_QMGR_PERR    60
    #define CYGNUM_HAL_INTERRUPT_MCU_ERR      61
    #define CYGNUM_HAL_INTERRUPT_EXP_PERR     62
    #endif

The list of interrupt vectors may be augmented on a per-platform basis. Consult the platform HAL documentation for your platform for whether this is the case.

## Interrupt controller functions

The source file `src/ixp425_misc.c` within this package provides most of the support functions to manipulate the interrupt controller. The `hal_IRQ_handler` queries the IRQ status register to determine the interrupt cause. Functions `hal_interrupt_mask` and `hal_interrupt_unmask` enable or disable interrupts within the interrupt controller.

GPIO interrupts are configured in the `hal_interrupt_configure` function, where the level and up arguments are interpreted as follows:

level | up | interrupt on
--- | --- | ---
0 | 0 | Falling Edge
0 | 1 | Rising Edge
0 | -1 | Either Edge
1 | 0 | Low Level
1 | 1 | High Level

Some interrupts are acknowledged in the `hal_interrupt_acknowledge` function, although for many of the IXP4xx on-chip peripherals, the means to stop the interrupt from triggering again is to remove the cause of the interrupt in a device dependent way. This function does however clear GPIO interrupts.

Macros of the following forms:

    HAL_PLF_INTERRUPT_MASK(vector)
    HAL_PLF_INTERRUPT_UNMASK(vector)
    HAL_PLF_INTERRUPT_ACKNOWLEDGE(vector)
    HAL_PLF_INTERRUPT_CONFIGURE(vector)

may be defined by the platform HAL via the header file defined by its CYGBLD_HAL_PLATFORM_H macro definition in order to extend support to further vectors.

Note that in all the above, it is not recommended to call the described functions directly. Instead either the HAL macros (`HAL_INTERRUPT_MASK` et al) or preferably the kernel or driver APIs should be used to control interrupts.

## Interrupt handling withing standalone applications

For non-eCos standalone applications running under RedBoot, it is possible to install an interrupt handler into the interrupt vector table manually. Memory mappings are platform-dependent and so the platform documentation should be consulted, but in general the address of the interrupt table can be determined by analyzing RedBoot's symbol table, and searching for the address of the symbol name hal_interrupt_handlers. Table slots correspond to the interrupt numbers above. Pointers inserted in this table should be pointers to a C/C++ function with the following prototype:

    extern unsigned int isr( unsigned int vector, unsigned int data );

For non-eCos applications run from RedBoot, the return value can be ignored. The vector argument will also be the interrupt vector number. The data argument is extracted from a corresponding table named hal_interrupt_data which immediately follows the interrupt vector table. It is still the responsibility of the application to enable and configure the interrupt source appropriately if needed.

## IXP46x

Support exists for the IXP46x in order to query and manipulate the extended interrupt controller registers handling interrupt numbers of 32 and above. Also on the IXP46x an interrupt handler is attached to handle ECC errors from the MCU.

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