2009-07-30  Nick Garnett  <nickg@ecoscentric.com>

	* src/ser_pl011.c (pl011_serial_init): Add call to
	CYGHWR_IO_SERIAL_PL011_CONFIGURE() macro if it is defined. This
	allows GPIO and clock setup on those platforms that require it.

2008-12-17  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/ser_pl011.cdl: 
	* src/ser_pl011.h (_UART_IFLS): Enable FIFO support.

2008-06-04  Jonathan Larmour  <jifl@eCosCentric.com>

	* cdl/ser_pl011.cdl: Fix description typo, and tidy build option.
	* src/ser_pl011.c: Use platform UART clock macro if possible for
	clock used for baud rate calculations.
	(serial_config_port): Enable RTS even without flow control.
	(pl011_serial_set_config):
	CYG_IO_SET_CONFIG_SERIAL_HW_RX_FLOW_THROTTLE really should do
	something, irrespective of hardware FIFO automatic control of RTS/CTS
	when we need to throttle our own end due to our own limitations, so
	handle that.

2008-05-13  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/ser_pl011.h: New file based on Versatile board HAL definitions
	for UART.
	* src/ser_pl011.c: Use ser_pl011.h.

2005-03-30  Nick Garnett  <nickg@ecoscentric.com>

	* src/ser_pl011.c (pl011_serial_putc): Disable interrupts here
	briefly so that a potential TXINTR does not vanish immedately and
	confuse the interrupt controller into provoking a spurious
	interrupt. This only happens under very high load on the AHB
	bus.

2004-05-07  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/ser_pl011.cdl: 
	* src/ser_pl011.c:
	New package -- support for ARM PL011 macrocell UART controller.

//===========================================================================
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// Copyright (C) 2004, 2008, 2009 eCosCentric Limited                             
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