	.equ	armreg_r0,0
	.equ	armreg_r4,16
	.equ	armreg_r8,32
	.equ	armreg_r9,36
	.equ	armreg_r10,40
	.equ	armreg_sp,52
	.equ	armreg_fp,44
	.equ	armreg_ip,48
	.equ	armreg_lr,56
	.equ	armreg_pc,60
	.equ	armreg_cpsr,64
	.equ	armreg_vector,68
	.equ	armreg_svclr,72
	.equ	armreg_svcsp,76
	.equ	ARMREG_SIZE,80
	.equ	CYGNUM_HAL_ISR_COUNT,39
	.equ	CYGNUM_HAL_VSR_COUNT,8
	.equ	CYGNUM_HAL_EXCEPTION_ILLEGAL_INSTRUCTION,1
	.equ	CYGNUM_HAL_EXCEPTION_INTERRUPT,2
	.equ	CYGNUM_HAL_EXCEPTION_CODE_ACCESS,3
	.equ	CYGNUM_HAL_EXCEPTION_DATA_ACCESS,4
	.equ	CYGNUM_HAL_VECTOR_IRQ,6
	.equ	RAISE_INTR,769
	.equ	CPSR_IRQ_DISABLE,128
	.equ	CPSR_FIQ_DISABLE,64
	.equ	CPSR_THUMB_ENABLE,32
	.equ	CPSR_USER_MODE,16
	.equ	CPSR_IRQ_MODE,18
	.equ	CPSR_FIQ_MODE,17
	.equ	CPSR_SUPERVISOR_MODE,19
	.equ	CPSR_UNDEF_MODE,27
	.equ	CPSR_MODE_BITS,31
	.equ	CPSR_INITIAL,211
	.equ	CPSR_THREAD_INITIAL,19
	.equ	CYGNUM_CALL_IF_TABLE_SIZE,64
	.equ	CYGNUM_HAL_INTERRUPT_NONE,-1
	.equ	HAL_ARM_RESET_VECTOR,0
	.equ	HAL_ARM_UNDEFINED_VECTOR,4
	.equ	HAL_ARM_SWI_VECTOR,8
	.equ	HAL_ARM_PREFETCH_VECTOR,12
	.equ	HAL_ARM_ABORT_VECTOR,16
	.equ	HAL_ARM_RESERVED_VECTOR,20
	.equ	HAL_ARM_IRQ_VECTOR,24
	.equ	HAL_ARM_FIQ_VECTOR,28
	.equ	HAL_ARM_RESET_VECTOR_ADDR,32
	.equ	HAL_ARM_UNDEFINED_VECTOR_ADDR,36
	.equ	HAL_ARM_SWI_VECTOR_ADDR,40
	.equ	HAL_ARM_PREFETCH_VECTOR_ADDR,44
	.equ	HAL_ARM_ABORT_VECTOR_ADDR,48
	.equ	HAL_ARM_RESERVED_VECTOR_ADDR,52
	.equ	HAL_ARM_IRQ_VECTOR_ADDR,56
	.equ	HAL_ARM_FIQ_VECTOR_ADDR,60
	.equ	HAL_BREAKINST_THUMB,48830
	.equ	HAL_BREAKINST_ARM,-402661634
