eCos Reference Manual
Prev | Chapter 26. The eCos PCI Library | Next

# PCI Library reference

This document defines the PCI Support Library for eCos.

The PCI support library provides a set of routines for accessing the PCI bus configuration space in a portable manner. This is provided by two APIs. The high level API is used by device drivers, or other code, to access the PCI configuration space portably. The low level API is used by the PCI library itself to access the hardware in a platform-specific manner, and may also be used by device drivers to access the PCI configuration space directly.

Underlying the low-level API is HAL support for the basic configuration space operations. These should not generally be used by any code other than the PCI library, and are present in the HAL to allow low level initialization of the PCI bus and devices to take place if necessary.

## PCI Library API

The PCI library provides the following routines and types for accessing the PCI configuration space.

The API for the PCI library is found in the header file `<cyg/io/pci.h>`.

## Definitions

The header file contains definitions for the common configuration structure offsets and specimen values for device, vendor and class code.

## Types and data structures

The following types are defined:

    typedef CYG_WORD32 cyg_pci_device_id;

This is comprised of the bus number, device number and functional unit numbers packed into a single word. The macro `CYG_PCI_DEV_MAKE_ID()`, in conjunction with the `CYG_PCI_DEV_MAKE_DEVFN()` macro, may be used to construct a device id from the bus, device and functional unit numbers. Similarly the macros `CYG_PCI_DEV_GET_BUS()`, `CYG_PCI_DEV_GET_DEVFN()`, `CYG_PCI_DEV_GET_DEV()`, and `CYG_PCI_DEV_GET_FN()` may be used to extract the constituent parts of a device id. It should not be necessary to use these macros under normal circumstances. The following code fragment demonstrates how these macros may be used:

      // Create a packed representation of device 1, function 0
      cyg_uint8 devfn = CYG_PCI_DEV_MAKE_DEVFN(1,0);

      // Create a packed devid for that device on bus 2
      cyg_pci_device_id devid = CYG_PCI_DEV_MAKE_ID(2, devfn);

      diag_printf("bus %d, dev %d, func %d\n",
                  CYG_PCI_DEV_GET_BUS(devid),
                  CYG_PCI_DEV_GET_DEV(CYG_PCI_DEV_GET_DEVFN(devid)),
                  CYG_PCI_DEV_GET_FN(CYG_PCI_DEV_GET_DEVFN(devid));

    typedef struct cyg_pci_device;

This structure is used to contain data read from a PCI device's configuration header by `cyg_pci_get_device_info()`. It is also used to record the resource allocations made to the device.

    typedef CYG_WORD64 CYG_PCI_ADDRESS64;
    typedef CYG_WORD32 CYG_PCI_ADDRESS32;

Pointers in the PCI address space are 32 bit (IO space) or 32/64 bit (memory space). In most platform and device configurations all of PCI memory will be linearly addressable using only 32 bit pointers as read from base_map[].

The 64 bit type is used to allow handling 64 bit devices in the future, should it be necessary, without changing the library's API.

## Functions

    void cyg_pci_init(void);

Initialize the PCI library and establish contact with the hardware. This function is idempotent and can be called either by all drivers in the system, or just from an application initialization function.

    cyg_bool cyg_pci_find_device( cyg_uint16 vendor,
    			      cyg_uint16 device,
    			      cyg_pci_device_id *devid );

Searches the PCI bus configuration space for a device with the given vendor and device ids. The search starts at the device pointed to by devid, or at the first slot if it contains CYG_PCI_NULL_DEVID. *devid will be updated with the ID of the next device found. Returns `true` if one is found and `false` if not.

    cyg_bool cyg_pci_find_class( cyg_uint32 dev_class,
    			     cyg_pci_device_id *devid );

Searches the PCI bus configuration space for a device with the given dev_class class code. The search starts at the device pointed to by devid, or at the first slot if it contains CYG_PCI_NULL_DEVID.

*devid will be updated with the ID of the next device found. Returns `true` if one is found and `false` if not.

    cyg_bool cyg_pci_find_next( cyg_pci_device_id cur_devid,
    			    cyg_pci_device_id *next_devid );

Searches the PCI configuration space for the next valid device after cur_devid. If cur_devid is given the value CYG_PCI_NULL_DEVID, then the search starts at the first slot. It is permitted for next_devid to point to cur_devid. Returns `true` if another device is found and `false` if not.

    cyg_bool cyg_pci_find_matching( cyg_pci_match_func *matchp,
                                    void * match_callback_data,
    			        cyg_pci_device_id *devid );

Searches the PCI bus configuration space for a device whose properties match those required by the caller supplied cyg_pci_match_func. The search starts at the device pointed to by devid, or at the first slot if it contains `CYG_PCI_NULL_DEVID`. The devid will be updated with the ID of the next device found. This function returns `true` if a matching device is found and `false` if not.

The match_func has a type declared as:

    typedef cyg_bool (cyg_pci_match_func)( cyg_uint16 vendor,
                                           cyg_uint16 device,
                                           cyg_uint32 class,
                                           void *     user_data);

The vendor, device, and class are from the device configuration space. The user_data is the callback data passed to `cyg_pci_find_matching`.

    void cyg_pci_get_device_info ( cyg_pci_device_id devid,
    			       cyg_pci_device *dev_info );

This function gets the PCI configuration information for the device indicated in devid. The common fields of the `cyg_pci_device` structure, and the appropriate fields of the relevant header union member are filled in from the device's configuration space. If the device has not been enabled, then this function will also fetch the size and type information from the base address registers and place it in the base_size[] array.

    void cyg_pci_set_device_info ( cyg_pci_device_id devid,
    			       cyg_pci_device *dev_info );

This function sets the PCI configuration information for the device indicated in devid. Only the configuration space registers that are writable are actually written. Once all the fields have been written, the device info will be read back into *dev_info, so that it reflects the true state of the hardware.

    void cyg_pci_read_config_uint8(  cyg_pci_device_id devid,
    				 cyg_uint8 offset, cyg_uint8 *val );
    void cyg_pci_read_config_uint16( cyg_pci_device_id devid,
    				 cyg_uint8 offset, cyg_uint16 *val );
    void cyg_pci_read_config_uint32( cyg_pci_device_id devid,
    				 cyg_uint8 offset, cyg_uint32 *val );

These functions read registers of the appropriate size from the configuration space of the given device. They should mainly be used to access registers that are device specific. General PCI registers are best accessed through `cyg_pci_get_device_info()`.

    void cyg_pci_write_config_uint8(  cyg_pci_device_id devid,
    				  cyg_uint8 offset, cyg_uint8 val );
    void cyg_pci_write_config_uint16( cyg_pci_device_id devid,
    				  cyg_uint8 offset, cyg_uint16 val );
    void cyg_pci_write_config_uint32( cyg_pci_device_id devid,
    				  cyg_uint8 offset, cyg_uint32 val );

These functions write registers of the appropriate size to the configuration space of the given device. They should mainly be used to access registers that are device specific. General PCI registers are best accessed through `cyg_pci_get_device_info()`. Writing the general registers this way may render the contents of a `cyg_pci_device` structure invalid.

## Resource allocation

These routines allocate memory and I/O space to PCI devices.

    cyg_bool cyg_pci_configure_device( cyg_pci_device *dev_info )

Allocate memory and IO space to all base address registers using the current memory and IO base addresses in the library. The allocated base addresses, translated into directly usable values, will be put into the matching base_map[] entries in *dev_info. If *dev_info does not contain valid base_size[] entries, then the result is `false`. This function will also call `cyg_pci_translate_interrupt()` to put the interrupt vector into the HAL vector entry.

    cyg_bool cyg_pci_configure_bus( cyg_uint8 bus, cyg_uint8 *next_bus )

Allocate memory and IO space to all base address registers on all devices on the given bus and all subordinate busses. If a PCI-PCI bridge is found on bus, this function will call itself recursively in order to configure the bus on the other side of the bridge. Because of the nature of bridge devices, all devices on the secondary side of a bridge must be allocated memory and IO space before the memory and IO windows on the bridge device can be properly configured. The next_bus argument points to the bus number to assign to the next subordinate bus found. The number will be incremented as new busses are discovered. If successful, `true` is returned. Otherwise, `false` is returned.

    cyg_bool cyg_pci_translate_interrupt( cyg_pci_device *dev_info,
    				      CYG_ADDRWORD *vec );

Translate the device's PCI interrupt (INTA#-INTD#) to the associated HAL vector. This may also depend on which slot the device occupies. If the device may generate interrupts, the translated vector number will be stored in vec and the result is `true`. Otherwise the result is `false`.

    cyg_bool cyg_pci_allocate_memory( cyg_pci_device *dev_info,
                                      cyg_uint32 bar,
                                      CYG_PCI_ADDRESS64 *base );
    cyg_bool cyg_pci_allocate_io( cyg_pci_device *dev_info,
                                  cyg_uint32 bar,
                                  CYG_PCI_ADDRESS32 *base );

These routines allocate memory or I/O space to the base address register indicated by bar. The base address in *base will be correctly aligned and the address of the next free location will be written back into it if the allocation succeeds. If the base address register is of the wrong type for this allocation, or dev_info does not contain valid base_size[] entries, the result is `false`. These functions allow a device driver to set up its own mappings if it wants. Most devices should probably use `cyg_pci_configure_device()`.

    void cyg_pci_set_memory_base( CYG_PCI_ADDRESS64 base );
    void cyg_pci_set_io_base( CYG_PCI_ADDRESS32 base );

These routines set the base addresses for memory and I/O mappings to be used by the memory allocation routines. Normally these base addresses will be set to default values based on the platform. These routines allow these to be changed by application code if necessary.

## PCI Library Hardware API

This API is used by the PCI library to access the PCI bus configuration space. Although it should not normally be necessary, this API may also be used by device driver or application code to perform PCI bus operations not supported by the PCI library.

    void cyg_pcihw_init(void);

Initialize the PCI hardware so that the configuration space may be accessed.

    void cyg_pcihw_read_config_uint8(  cyg_uint8 bus,
                   cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 *val);
    void cyg_pcihw_read_config_uint16( cyg_uint8 bus,
                   cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 *val);
    void cyg_pcihw_read_config_uint32( cyg_uint8 bus,
                   cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 *val);

These functions read a register of the appropriate size from the PCI configuration space at an address composed from the bus, devfn and offset arguments.

    void cyg_pcihw_write_config_uint8(  cyg_uint8 bus,
                    cyg_uint8 devfn, cyg_uint8 offset, cyg_uint8 val);
    void cyg_pcihw_write_config_uint16( cyg_uint8 bus,
                    cyg_uint8 devfn, cyg_uint8 offset, cyg_uint16 val);
    void cyg_pcihw_write_config_uint32( cyg_uint8 bus,
                    cyg_uint8 devfn, cyg_uint8 offset, cyg_uint32 val);

These functions write a register of the appropriate size to the PCI configuration space at an address composed from the bus, devfn and offset arguments.

    cyg_bool cyg_pcihw_translate_interrupt( cyg_uint8 bus,
    					cyg_uint8 devfn,
    					CYG_ADDRWORD *vec);

This function interrogates the device and determines which HAL interrupt vector it is connected to.

## HAL PCI support

HAL support consists of a set of C macros that provide the implementation of the low level PCI API.

    HAL_PCI_INIT()

Initialize the PCI bus.

    HAL_PCI_READ_UINT8( bus, devfn, offset, val )
    HAL_PCI_READ_UINT16( bus, devfn, offset, val )
    HAL_PCI_READ_UINT32( bus, devfn, offset, val )

Read a value from the PCI configuration space of the appropriate size at an address composed from the bus, devfn and offset.

    HAL_PCI_WRITE_UINT8( bus, devfn, offset, val )
    HAL_PCI_WRITE_UINT16( bus, devfn, offset, val )
    HAL_PCI_WRITE_UINT32( bus, devfn, offset, val )

Write a value to the PCI configuration space of the appropriate size at an address composed from the bus, devfn and offset.

    HAL_PCI_TRANSLATE_INTERRUPT( bus, devfn, *vec, valid )

Translate the device's interrupt line into a HAL interrupt vector.

    HAL_PCI_ALLOC_BASE_MEMORY
    HAL_PCI_ALLOC_BASE_IO

These macros define the default base addresses used to initialize the memory and I/O allocation pointers.

    HAL_PCI_PHYSICAL_MEMORY_BASE
    HAL_PCI_PHYSICAL_IO_BASE

PCI memory and IO range do not always correspond directly to physical memory or IO addresses. Frequently the PCI address spaces are windowed into the processor's address range at some offset. These macros define offsets to be added to the PCI base addresses to translate PCI bus addresses into physical memory addresses that can be used to access the allocated memory or IO space.

> Note: The chunk of PCI memory space directly addressable though the window by the CPU may be smaller than the amount of PCI memory actually provided. In that case drivers will have to access PCI memory space in segments. Doing this will be platform specific and is currently beyond the scope of the HAL.

    HAL_PCI_IGNORE_DEVICE( bus, dev, fn )

This macro, if defined, may be used to limit the devices which are found by the bus scanning functions. This is sometimes necessary for devices which need special handling. If this macro evaluates to `true`, the given device will not be found by `cyg_pci_find_next` or other bus scanning functions.

    HAL_PCI_IGNORE_BAR( dev_info, bar_num )

This macro, if defined, may be used to limit which BARs are discovered and configured. This is sometimes necessary for platforms with limited PCI windows. If this macro evaluates to `true`, the given BAR will not be discovered by `cyg_pci_get_device_info` and therefore not configured by `cyg_pci_configure_device`.

Prev | Home | Next
The eCos PCI Library | Up | FLASH Library